Siemens PC-D/X S26361-L17-V25 HOS: 10 Fabr.Nr. 600572 This type plate shows that PC-D and PC-X came in an identical case. However, as far as their hardware was concerned, there was one major difference: the PC-X came with an additional MMU (memory management unit) required for SINIX. The tape symbol below that blind to the right points out another hardware difference: some machines came with a tape drive (streamer) as option - in this case that blind holds a tape connector. As Hans Franke has pointed out, these machines had an OMTI 5300 instead of the 5100 used in this particular machine (the OMTI 5100 can't control a streamer). Tape drives were quite common these days, and what's interesting, often used as disk replacement (not only for backups) - the IBM 5100 and its' decendants, for example, came with an integrated QIC DC300, and even the famous IBM 5150 (IBM PC) came with a tape connector for compatiblity (although of course its architecure was substantially different from the IBM 5100 family)

Overview of the opened up Siemens PC-D: on the left, the enormous power supply with a large cooling fan at the machine's rear (it's a PAPST, btw) and the OMTI 5100 hostadaptor on its top (connected to the motherboard with a 50 pin SCSI cable, two smaller ones (20 and 34 pin) connected to the harddisk - see below for a closeup on the OMTI). Right from that are the drives: a BASF 6188 harddisk (5.25 inch, half-height, ST506-interface, 13.3 MB) and the TEAC FD-55FV-13-U floppy disk drive, capable of handling both 360KB/ 40 tracks (IBM-format) and 720KB/ 80 tracks diskettes (the latter being a quite unusual standard which was mostly found in CP/M systems). Behind the drives is the PC-D's 'graphic display controller', residing on the machine's internal VG96 local bus. When using additional VG96 expansion boards, there were just put onto an existing board, stacking them vertically (again, see below for more details). Note also the above mentioned blind for a tape connector, right from the PSU fan

Overview of the opened up Siemens PC-D, this time with drives and display controller removed: the left side, with PSU and OMTI was already mentioned above. Now to the board: on its left side, below the orange PSU connector, is the SM912 SCSI-INT (D29) with blue 50 pin connector for the OMTI 5100 hostadaptor. Right from these are the ROMs (D42, D43), with the heat-sink covered i80186 CPU (square flipchip package at D34) below them. Further below and a little left, next to one of the blue onboard floppy connectors (FD2, location XB), is the WDC floppy disc controller (D2). Right from that floppy connector are the piezo-electric buzzer (H1) and two empty sockets (D7, D8, one for an i8087 FPU, the other one for an i82188 IBC). Moving further right, above the second floppy connector (FD1, XC) is the RAM bank, consisting of 36 DIP sockets (D100-D135), with 18 occupied in this machine. Above the RAM bank are the Intel C8208 DRAM-controller (D50), and the smaller Intel 8288 bus controller (at D64, right from the VG96 bus) further above. Behind the VG96 are two Intel 8259A (D73, D77) with three Motorola MC2661PB among them (D74-D76, a little darker than the 8259). Moving right from these is another empty socket (D79), which can, according to Hans Franke, take a 2K 6116-type RAM (providing an additional battery backed-up RAM area). Further right, a Motorola MC146818P (D97), and finally, the green lithium battery

board silkscreening, part 1: SYBAC S26361-D359 V2 GS

board silkscreening, part 2: W26361-D359-24-01-36 W26361-D359-24-01-54   C26361-D359-W100 W26361-D359-24-01-5 Beneath it, the 3.5V lithium battery for backing up the machine's clock (and a RAM chip at location D79, if present)

The Intel i80186 (location D34), here in flipchip package and with heatsink removed, was rarely used in PC designs. It was basically a microcontroller-version of the i8086 ('true' 16 bit CPU) and the link between that and the upcoming i80286 (which was launched almost at the same time). It has an additional ALU ('arithmetic logical unit'), speeding up complex code (especially with many branches), and 7 new instructions - some say it's in many ways a i80286 without protected mode. It also integrates timer, DMA- and interrupt controller on-die, saving up to 25 ICs in the mainboard design. Besides that, the i80186 is, of course, fully opcode-compatible with its ancestor. Right behind it, however, the 16.000 MHz quartz (at G1) which drives it (clock/2 = 8.000 MHz). Back to the i80186, it's interesting to know that the direct successors, Intel 80C186 and i80C188 (CMOS-variants released in 1987), were quite popular for embedded system designs (with i80C186XL and i80C188XL being the last members of the family). Also interesting to know is that Intel's 'all-time opponent', Motorola, also had such an 'intermediate stage' CPU, the Motorola MC68010 (DIP)/ MC68012 (PLCC). It was an improved version of the successful MC68000, adding new instructions and a MMU interface (though no additional hardware on-die, like in the i80186), released shortly before the MC68020

Empty sockets on the PC-D's board: on the left picture, with the piezo-electric buzzer to its right, is an 28 pin DIP socket (at D7), for taking an i82188 IBC (integrated bus controller). The IBC is the interface between CPU and FPU, supplying the latter with all required bus signals. In i8086/ i8088, the i8288 bus controller is sufficient for that purpose, but the i80186 and i80188 require additional logic in their FPU interface. Above that, however, the 40 pin FPU socket (D8) for the i8087 floating point unit. Like in the i8086 design, the FPU (if present) acts as a second CPU, by placing the i80(1)86 in 'MAXIMUM' mode. The i8087 then has equal access rights to all I/O functions, and operates parallely to the CPU. Without FPU, the i8086/ i80186 will run in 'MINIMUM' mode. This is quite interesting, since in the later Intel designs (from i80286 on), CPU and FPU acted more like master and slave (e.g. CPU detects FPU activity with a BUSY-pin). Also notable is that an i80C187 FPU exists, but as the 'C' implies it was developed for the later CMOS i80C186 and its successors (providing a complete i80387 instruction set, and unusable in the PC-D). Finally, to the right picture. Here you can see another empty 28 pin DIP socket (location D79, next to the battery), which can, according to Hans Franke, take a 6116-type RAM, which provides the PC-D with an additional, battery-backed up 2K I/O RAM area

The Siemens PC-D's RAM bank, consisting of 36 DIP16 sockets, suitable for 256Kx1 DRAMs. This particular machine came with 18 pcs. NEC D41256C-15 (at locations D100-D117), for a total of 512 KBytes (normally 576K, but each bank uses one D41256C for providing parity bits). By occupying the empty sockets (D118-D135), the machine can be upgraded to 1024 KBytes RAM (which is the maximum i8086 and i80186 can handle, by the way - upon introduction of the i80286 and its protected mode, access to up to 16 MBytes was possible). Note that, according to Hans Franke, this 'redesign model' of the PC-D can be configured for zero waitstate memory access by setting a jumper - for compatibility's sake, 1 WS access is enabled by default (the PC-X required this waitstate for MMU operation). Also interesting to know is that earlier PC-D revisions could also use 64Kx1 DRAMs

These two P26361 (at D42 & D43, labeled also with the board's designation D359) are the ROMs containing Phoenix diagnostic firmware, Siemens PC-D graphic BIOS and bootstrap logic. The graphic BIOS got its name because it's an extended version of the older machines' BIOS, now capable of handling the graphic display controller properly (earlier machines came with the 'alphanumeric display controller'). The diagnostic firmware provides the user (and developer) with lots of useful diagnostic and debugging functions - should an application crash, for example, it shows up with useful information (just like the later RM-series): you get a cause (like 'BUS ERROR'), the afflicted memory segment, state of CPU flags and so on. There's also an additional red LED on the machine's front, which is used for diagnostic output (e.g. it's lit while the machine performs hardware diagnostics at startup). Interesting to know in that context is that the BIOS natively supports all PC-D default hardware, including SCSI devices

The PC-D's graphic display controller, capable of outputting 80x25 text and 640x350/ 720x350 pixel graphics (monochrome, not complying to any standard). Ealiest machines made use of the MDA-like (but not MDA-compatible) 'alphanumeric display controller'. Interesting about both is that they are not just graphic adapters, but complete terminals (in fact, enhanced VT220). This becomes obvious while beholding the card in detail: on the board's leftmost center, a S8529 (aka SCN2674B) 'Advanced Video Display Controller' can be found. The very same is also used in many serial terminals (e.g. from Wyse), and features some advanced text modes (such as 80x24, 132x25 or 132x44), which are, as Hans Franke has pointed out, indeed available and BIOS-supported in the PC-D. Below that, a NEC D8741AD, a programmable peripheral controller with EPROM integrated and labeled '016 D6 GS3/ 011 803' by Siemens. Right from the D8741AD is a NEC D4364C-15 (8Kx8 SRAM), with a silkscreening below: 'W26361-D321-V1-Z4-02-5'. The rest of the board is dominated by TTL ICs and the VG96 connector in the top middle, except for 4 pcs. NEC D41416C-15 (16Kx4) = 32KB, which seem to be the video RAM, and are located below and right from the VG96 connector

This is one of the most interesting parts of the Siemens PC-D's unique architecture: its internal local bus, using 96 pin (VG96-style) connectors (here the onboard connector at location XH). As a local bus, it allows (buffered) access to all CPU signals. Additionally, the VG96 connectors' electrical specifications make it more reliable than other bus system of its time, such as ISA. This is why other designs, especially in industrial environments, used the very same connectors - the VME bus (IEEE1014-1987) and Siemens' later AT96 bus (DIN 41612) are good examples. However, the PC-D's local bus seems to be proprietary and not related to AT96, which is just a 16 bit ISA bus using VG96 connectors. By default, the PC-D came with one VG96 card, the display controller. As you can guess from the pictures above, the VG96 cards in the PC-D are indeed stacked vertically - another difference to the VG96 implementations mentioned earlier

The NMOS-produced WD2793 (WDC279x-series, location D2) was a popular floppy-controller, having been used e.g. in the ATARI 1050 diskdrive. It was the direct successor to the FD1771 and FD179x-series controllers, and is fully software compatible. It supports the older formats IBM 3740 (128 bytes/ sector, 26 sectors/ track, 77 tracks/ side, FM encoding) and IBM System/34 (like 3740 but 256 bytes/ sector, MFM), providing 260-1040K/ disk, but can also be programmed to support 512 or 1024 bytes per sector. For reading standard IBM PC/ XT compatible disks, for example, sector size is 512 bytes for 360K/ disk (512 bytes/ sector * 9 sectors/ track * 40 tracks * 2 sides = 368.640 bytes). Controlling the TEAC FD-55FV-13-U diskdrive used in the PC-D, it provides the (for IBM-compatibles) unusal format of 720K/ 5.25" disk (like 360K but with 80 tracks) - a standard which was also very common in MSX computers. In addition to the 'mini floppy disks' (5.25"), the WD279x-series also supports the older 8" floppy disk drives, and contains an on-chip data separator (which is required as additional IC for some other floppy controllers)

The SM912 SCSI-INT (SCSI interface) at D29, with the 50 pin SCSI connector (location XA) behind. The SM912 is a Siemens-produced SCSI chip, normally used to interface to SCSI disks, which naturally come with their own controller logic (i.e. the SM912 acting as hostadaptor). In the PC-D, it's used in a slightly different, but interesting way: instead of directly interfacing to SCSI devices, it connects to an OMTI 5100 controller, to serve ST412/ ST506 harddisks (which were cheaper than SCSI). According to Hans Franke, however, it can also be used to 'ordinarily' connect SCSI disks,which are fully supported by the machine's BIOS

Here the machine's harddisk controller, a Scientific Micro Systems (SMS) OMTI Model 5100 Rev.D. It uses a 50 pin SCSI-interface for connecting to the PC-D's mainboard (i.e. to its SM912), and allows up to two ST506/ ST412 type harddisks to be connected. This is a clever solution because you didn't have to buy the more expensive SCSI disks. ST506 and ST412 were Shugart-/ Seagate-developed ancestors of today's IDE/ ATA buses, and basically evolved diskette interfaces (the only difference between ST506 and ST412 being the buffered seek feature, which was added to the ST412). Since the OMTI 5100 doesn't support streamers, PC-D/ PC-X with tapedrive came with an OMTI 5300 instead, which also added a floppy-interface (although unused because of the onboard WD2793). Now let's have a look at some of the controllers components: beginning on the left, you can its connectors, 1x 34 pin and 2x 20 pin for the two possible harddisks (ST506/ ST412 standards use a 'data cable' connected to each drive and a 'control cable' which connects to all drives, i.e. daisy-chaining them), and 1x 50 pin for the SCSI-interface. Note that right from the two data cable connectors are spare pads for another two, labeled 'FEATURE', and left from the SCSI-connector is a jumper W1 for SCSI parity select. Moving right from the SCSI-connector there's a jumper bank (W0), which is used to select the SCSI-ID. Another jumper bank (W4) can be found on the lower side, and can be used to select between different Bytes per Sector and Sectors per Track combinations. The rest of the chips found here are controller logic driven by a Zilog Z8 'ROMLESS' (Z8681-12, middle right). The Z8 is a microcontroller unit that integrates a Z80-derivate CPU (not Z80 I/O-compatible), timers and DMA-capability. 'ROMLESS' means that it can execute code from an external ROM (which is the EPROM below it, I assume)

From left to right: Intel 8259A 'PIC' ('programmable interrupt controller', D77), 3 pcs. Motorola MC2661PB 'EPCI' ('enhanced programmable communications interface', D74-D76), and another i8259A (D73). As the name implies, the PICs are used for serving peripherals' interrupt requests (such as keyboard, parallel/ serial or expansion devices), so that their data can be fetched/ processed (=CPU operation is interrupted). So far nothing special, IRQs are the usual way for handling devices in IBM compatible designs and to avoid CPU polling. But because of the PC-D's amount of devices (such as additional serial ports and the i80186's on-die devices), its designers needed to implement more than the standard of 8 IRQs (like e.g. in the IBM PC). To do so, Intel had created a specification about how to cascade PICs in a master/ slave implementation. One PIC would act as a master, the other ones, being connected through the cascade bus (3 cascade lines, CAS0-2) and IRQ/ INT signals, acting as slaves. In the IBM AT, this is implemented with two PICs - IRQ2 of the first is connected to INT on the second, and IRQ9 (=IRQ1) on the second PIC now acts as IRQ2 (for compatibility's sake, but a little confusing). Back to the PC-D, its i80186 comes with an 8259-compatible interrupt controller integrated on-die, which acts as the master PIC. The two PICs shown above are the slaves (although the Intel Application Note AP-730 calls the first external PIC the 'secondary master PIC'). This makes a total of 22 IRQs (two used for cascading), and there's no need for that 'IRQ2 patch', making interrupt handling easier (but incompatible with the IBM AT design). There are other, smaller differences to a standard cascaded PIC design, such as advanced priority handling (which means that slave PICs can keep their interrupt priorities even while serving the master PIC), or the 80186's interrupt controller being able to act as slave PIC for an external 8259A and so on. But having talked so much about the PICs, let's now take a look at the three Motorola MC2661PB EPCI used for serial I/O. They were designed by Philips (aka SCN2661/ SCN68661) and are enhanced versions of their SCN2651 PCI series. Compared to the standard UARTs used for serial these days (like the i8250), the MC2661 has several advanced features for versatile use in different system designs, such as the ability to use an external baud rate clock, operate in synchronous/ asynchronous modes or support for IBM's BISYNC protocol (which was used in their mainframe/ terminal environments)

This Motorola MC146818P (location D97) is the PC-D's RTC ('real time clock chip'), the 'P' suffix indicating plastic package. It also contains 50 bytes low-power SRAM, which are backed up by the 3.5V lithium battery mentioned above. This RAM can be expanded with another 2048 bytes, by populating the empty socket at D79 with a 6116-type RAM; this RAM area could then be used for 3rd party applications. The RTC, however, works just by storing a given time in its RAM and then counting forward

The machine's dynamic RAM controller, the Intel C8208 (at D50). It seems to be a simpler offspring of the Intel 8207 dual-ported DRAM controller (although I've been unable to get a i8208 datasheet, yet). While the i8207 can handle 16K-, 64K- and 256K DRAMs, the i8208 is specialized on 64- and 256K DRAMs. As the 'dual-ported' implies, furthermore, the i8207 provides a RAM access interface for both CPU and FPU (or another device, theoretically), a feature which the i8208 lacks, as well

The machine's bus controller, the Intel 8288 (at D64). It's a standard support chip for Intel's 8088 and 8086 CPUs, and, still being part of today's PC chipsets, is used for coordinating activities on the I/O bus. To do that, it outputs bus control signals (i.e. read/ write), which are generated by decoding certain CPU status lines. As Hans Franke has noted, the designation 'bus controller' is exaggerated, it's just a demultiplexer with latch...

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